Three ‘Threes’: Qualcomm’s 2026 Investor Day and a Collision of Architecture Taxonomies

Abstract

On 24 June 2026, a hundred-billion-dollar chip company with consumer-electronics DNA laid an entire architectural layering of physical AI onto slides in New York. It had never heard of the architecture intelligence research series — yet in its own language, it independently touched every bone of that framework. And the way it touched them is more persuasive than any endorsement could be, because it wasn’t agreeing. It was converging.

This piece first sets out what was announced, then draws the comparison. What was announced: a three-layer interaction model for physical AI, a System 2/1/0 computing hierarchy for robots, a chip that delivers on that hierarchy (Dragonwing IQ10), a mixed-criticality automotive platform, and one path dependency stated out loud — that automotive and industrial experience is the “natural on-ramp” to robotics.

Two readings emerge from the comparison. First, the failure-philosophy watershed proposed in D1 has received spec-sheet-grade corroboration on one of Qualcomm’s robotics chips — and the corroboration appears higher in the stack than expected: the burden of proof was not quarantined at the actuation edge; it penetrated all the way to the brain. The same silicon that runs large VLA models must also be lock-step capable at SIL3. You cannot buy a fail-soft brain and then bolt a fail-operational spine onto it. Second, at least three architectural layerings are currently in circulation that all go by “three” and all use the words System or Computer — NVIDIA’s three computers, Waymo’s System 1/2, Qualcomm’s System 2/1/0. They share names, they collide, some even share a name while meaning different things — yet they are in fact three mutually orthogonal axes. This piece performs a formal disambiguation and mapping, folds Qualcomm’s taxonomy into the AI² framework, and honestly reports one gap and one boundary breach in the AR ladder that the mapping exposes.

This is not an article celebrating a framework being validated. It records something more delicate: the taxonomy of architectural layering is moving from the slogan phase into the formalisation phase, and naming rights are being contested. Whether a framework becomes a shared language depends on whether it can absorb other people’s classifications — not on whether it can run alongside them.

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A Note on Genre

This is a Deep Dive, not a Working Paper. The dividing line is not length but level of commitment:

• Working Paper (D1–D4, Zenodo DOI) = a locked claim. Not silently revisable; must withstand five years of citation.
• Deep Dive (this column) = a disciplined observation. Revisable, refutable, explicitly marked “this is what we see at this moment.” It does not enter the DOI system.

This piece inherits the epistemic discipline of the Working Papers — source tiering, traceable evidence, mandatory counter-arguments and failure modes — but not their finality. It does not revise any published conclusion in D1–D4. Where an existing judgement is sharpened, it is presented as “the reading at this moment”; formalisation is left to a future versioned document.

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1. Evidence on the Table: Where It Comes From, How Far It Can Be Trusted

Set out the provenance of the evidence first, then discuss what can be read from it. That is the rule in this research series: conclusions may be bold, evidence must be accounted for.

The foundation of this piece is three official decks from the 2026 Investor Day:

Under the source pyramid established in D3, investor-day decks are Tier 1 — official disclosure, equivalent in standing to shareholder-meeting material. This is the highest grade of primary source obtainable. Every citation here is pinned to a specific slide number so that anyone can go back and check.

But Tier 1 does not mean exempt from scrutiny. Three flags must be raised before proceeding, so that a company’s self-description is not mistaken for established fact:

1. This is a forward-looking statement. The first page of the deck is the forward-looking statements disclaimer. Design wins, roadmaps, TAM estimates — these are the company describing its own future, not events that have occurred.
2. The TAM is a mixed source. The white-space estimate is itself labelled “a combination of third-party and internal estimates” (slide 5 footnote), and the robot deployment figure within it cites “Qualcomm estimates based on McKinsey perspectives” — self-reported extrapolation, not independent third-party data.
3. One attribution here is our inference, not Qualcomm’s explicit statement. Slide 32 does not write out “IQ10 = System 2” in words; this piece connects them on the basis of the callout-line relationships on that page (see the footnote in §4.2). This is an inference, not an assertion — and this piece attacks it first, precisely where it matters most.

Flags raised. On to the substance.

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2. What Qualcomm Announced: The One-Page Version

Before drawing any comparison, set out what the event itself was. Readers unfamiliar with Qualcomm need a coordinate.

On 24 June 2026, Qualcomm held its 2026 Investor Day in New York. The through-line was a single sentence: retell a “mobile chip supplier” as a computing-platform company spanning handsets, automotive, IoT, robotics and the data centre. The financial targets were stated plainly — by fiscal 2029, have handsets, automotive+IoT, and the data centre each carry roughly a third of revenue; the underlying wager is roughly 40× growth in token demand between 2026 and 2030.

On the technical content, five blocks matter here:

One: a capability layering for physical AI. Qualcomm proposes three “interaction layers” — Human-facing AI (acting on the digital world), Instrumented AI (understanding the physical world), Embodied AI (acting on the physical world) — and stresses that they are compounding, not replacing one another (slide 4).

Two: a computing layering for robots. “A robot is not one computer. It’s three”: System 2 for reasoning (cerebrum), System 1 for action (cerebellum), System 0 for execution (nervous system) (slides 31, 33).

Three: a chip that delivers on that layering. Dragonwing IQ10: 700 TOPS multi-NPU, 18-core CPU, 64 GB memory, over 270 GB/s bandwidth, prepared for large VLA models — and, at the same time, safety island, ECC, lock-step CPU with SIL3, Safe RTOS (slide 32). The IQ10/IQ9/IQ8 tiers are already shipping across form factors (slide 39).

Four: a mixed-criticality platform on the automotive side. The Snapdragon Flex architecture places cockpit workloads and ADAS workloads on the same platform and marks a safety island; Qualcomm calls its processor the “first ever processor with true ‘mixed criticality’” (slides 10, 13).

Five: a path dependency stated out loud. Automotive and industrial experience is described by Qualcomm as the “natural on-ramp” to robotics — it makes no secret of the fact that this robotics stack is a seam between two existing territories (slide 27).

To the analysts in the room, this is a growth story; they will take apart the TAM and model the curves. What this research series sees in the same slides is something else.

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3. Same and Different: Where Qualcomm’s Layering Collides with the AR Series

A hundred-billion-dollar player that had never heard of this framework, facing the same physical constraints, independently produced a structurally isomorphic classification. Material of this kind is worth more than any single data point — because the vitality of a framework lies not in being cited but in being independently reproduced. When someone who has never read these papers draws the same layering diagram simply because they need to solve the same engineering problem, that suggests the diagram captures not the preferences of its author but the shape of the problem itself.

But convergence is also pressure. The taxonomy Qualcomm offers is contesting the same naming rights as the existing framework.

Before going into detail, set the correspondence out as a single table — what matches, what doesn’t, and what the rest of this piece will handle:

Figure 3.1 — Layering benchmark. Five currently circulating layerings aligned side by side. AR0–AR5 (capability-threshold axis) serves as the reference column, with Qualcomm’s three interaction layers projected onto it (Instrumented ≈ AR1–2, Embodied ≈ AR4; AR3 and AR5 vacant; Human-facing falling outside the axis entirely). The three columns on the right are orthogonal axes — Qualcomm’s System 2/1/0 (in-body hierarchy), NVIDIA’s three computers (lifecycle), Waymo’s System 1/2 (cognitive speed × deployment location). They do not compete with the AR ladder on the same dimension; each answers a different question. Gaps at AR3/AR5 are marked with dashed outlines, as is the domain breach.

This table is the map for the rest of this piece. Where things match, it suggests the framework caught the shape of the problem. Where they don’t, it is worth more than where they do — those points are the boundaries of the AR ladder itself.

The next two chapters take the two heaviest of them in turn: where exactly the watershed has been engraved (chapter 4), and what the three “threes” actually are to one another (chapter 5).

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4. The Watershed, Engraved in Silicon

4.1 What D1 Said at the Time

D1 §3.3 advanced a judgement: the fundamental divide between automotive and robotics on one side, and consumer electronics and cloud on the other, lies neither in real-time performance nor in compliance, but in failure philosophy —

Handsets and the internet approach fail-soft plus rapid recovery; cars and many robots require fail-safe / fail-operational plus explicable attribution of responsibility. This difference runs deeper than real-time performance and arrives earlier than compliance.

From this, D1 §3.7 derived a two-layer structure: infrastructure converges; control semantics and the burden of proof diverge.

When D1 was published, both judgements rested on architectural literature, standards matrices and industry observation. They were arguments, not specifications — reasoning, not yet a thumbprint pressed down by a real piece of silicon.

4.2 Qualcomm Presses the Thumbprint: the Burden of Proof Penetrates to the Brain

Qualcomm is a company with consumer-electronics DNA. This matters — because if the failure-philosophy divide were merely academic narrative, Qualcomm’s robotics offering is exactly where it would be easiest to falsify.

And the falsifying path was available, and it was the cheapest one: put a phone-grade AI SoC in the head to handle the “smart” part, and quarantine safety into a dedicated safety MCU out at the actuation edge. Fail-soft brain, fail-operational spine, each doing its own job and paying its own costs. If that path worked, consumer-electronics DNA would simply win — because it would only have to pay for safety at the cheapest, most peripheral layer.

Qualcomm did not take it.

Duggal’s deck, slide 32, gives the full specification of the Qualcomm Dragonwing IQ10. By the visual grammar of that page, the IQ10 appears as a chip marker on the head of a humanoid robot, with a callout line running to the specification box on the right; and the SYSTEM 2 | REASONING callout points to the head as well.¹ In other words, this specification describes the chip that carries reasoning — System 2, cerebrum, the brain.

Laid out, the specification comes in two halves:

Figure 4.1 — The two halves of one chip. The left column (reasoning side) is what a modern AI accelerator ought to look like — on some dimensions it is more aggressive than most handset SoCs (64 GB, >270 GB/s, prepared for large VLA models). The right column (proof side) belongs to a vocabulary entirely foreign to consumer electronics: safety island, ECC, lock-step SIL3, Safe RTOS. The core observation of this piece is the shape of this figure — two vocabularies engraved on the same chip, rather than split between brain and edge. Specification data from Duggal deck slide 32; the attribution IQ10 = System 2 is a visual-grammar inference (see the footnote to this section).

The left column is what a modern AI accelerator ought to look like. On some dimensions it is more aggressive than most handset SoCs — 64 GB, over 270 GB/s of bandwidth, prepared for large VLA models. The right column belongs to a vocabulary entirely foreign to consumer electronics.

This is the observation this piece considers most important: the burden of proof was not quarantined at the bottom. It penetrated to the brain.

In a handset, the SoC that runs the model has no safety island, needs no lock-step, runs no Safe RTOS. Here, the same chip that runs large VLA models must simultaneously be lock-step capable at SIL3.

The capability band on slide 31 nails this down one layer further: the System 2 workload is written out as “Heavy, mixed-criticality AI workloads” — the term “mixed-criticality” appears at the reasoning layer, not the execution layer.

This is D1 §3.4’s judgement replaying itself in silicon. D1 argued that mixed-criticality architecture — hard-real-time safety underneath, a rich OS on top, the two isolated by a hypervisor — is the only currently viable general remedy for the digital–physical gap, and called NVIDIA Drive Thor’s MIG, which extended virtualisation from the CPU domain into the GPU domain, “a technical breakthrough of landmark significance in the history of automotive architecture.” Qualcomm arrived independently at the same place, at the robot reasoning layer. Different vendor, different technical route, same shape of constraint.

The automotive-side evidence is equally unambiguous: slide 13 writes its processor up directly as the “first ever processor with true ‘mixed criticality’”; the Snapdragon Flex architecture on slide 10 puts cockpit workloads (Oryon CPU / Hexagon NPU / Adreno GPU / multiple displays) and ADAS workloads (perception / path planning / vehicle control / Highway & Urban NOA) into the same platform, and marks a safety island on that same diagram.

4.3 Sharpening a Judgement: the Watershed Is Not a Foundation, It Is a Through-Bolt

The same body of evidence also throws back a challenge that has to be faced.

If a single SoC can carry both the cockpit and L2–L4 ADAS, and if one Dragonwing IP set can cover form factors from industrial to humanoid — then how much is left of the sentence “automotive and consumer-electronics architectures are different,” once it reaches the level of silicon?

The answer is: almost nothing. And that is precisely what D1 §3.7 already wrote down.

D1’s two-layer judgement was never “the infrastructure of automotive and consumer electronics is different.” It said something else: the shared substrate of the first layer keeps converging — heterogeneous compute, an Ethernet backbone plus TSN, virtualisation and mixed-criticality operating systems, service-oriented interfaces, world-model simulation, OTA pipelines; while at the second layer, control semantics and the burden of proof keep diverging.

Qualcomm’s evidence verifies both layers at once:

• First layer, converging: one SoC carrying multiple domains, one IP set reused across form factors. This is convergence in its most extreme form.
• Second layer, diverging: and yet this very SoC must have a safety island; this very IP set must contain lock-step SIL3; and the platform is called mixed-criticality, not unified — the word “mixed” is itself a confession of divergence.

The reading at this moment: D1’s watershed judgement holds, and holds more strongly than the version in which it is usually paraphrased. What needs sharpening is not D1’s own text but our laziness in citing it afterwards — casually shortening “the burden of proof diverges” into “the infrastructure is different.” The former is confirmed by Qualcomm’s silicon; the latter is falsified by the same piece of silicon.

The IQ10 specification also gives a more precise shape. The watershed is not at the bottom of the system — it is not a foundation that can be routed around, but a through-bolt. So long as a system remains inside the chain of liability, the burden of proof will travel all the way up and penetrate its most “intelligent” layer. You cannot buy a fail-soft brain and then bolt a fail-operational spine onto it. Either the whole chain is on this side of the watershed, or it is not on it at all.

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5. Three “Threes” on the Same Table

5.1 Qualcomm’s First “Three”: Interaction Layers, and They Are “Compounding”

Duggal’s deck, slide 4, proposes: the three interaction layers of physical AI are compounding.

Fix your eyes on that verb: compounding. Qualcomm states explicitly that when the higher layers appear, the lower ones do not disappear — they stack.

That sentence is word-for-word isomorphic with a methodological principle of AR0–AR5. D1 §5.2 stressed it repeatedly:

AR levels denote capability thresholds, not a timeline; lower tiers do not vanish when higher tiers appear, but coexist with them over the long term.

Two teams, unknown to each other, facing the same problem, independently arrived at the same constraint. This is the best kind of evidence one can get about the validity of a framework — because it is not agreement, it is convergence. Agreement can be politeness. Convergence does not lie.

5.2 Qualcomm’s Second “Three”: A Robot Is Not One Computer, It’s Three

The title of slide 31 in Duggal’s deck is blunt: A robot is not one computer. It’s three.

Qualcomm picked a neuroanatomical metaphor. It is worth pausing here — because D3’s core original finding used the same metaphor, and predates this deck.

In dissecting the mechanisms of Tesla’s cross-form-factor reuse, D3 proposed: the brain is reusable, the cerebellum is not. The perception and reasoning stack can be transferred from FSD to Optimus; kinematics, actuator control and the real-time safety layer cannot. What Qualcomm has done is cut the “cerebellum” side of D3 once more — separating motion planning (System 1) from real-time interaction and always-on sensing (System 0).

Slide 33 grounds these three layers in physical structure, and the reading there is far richer than the abstract definitions on slide 31:

• System 2 appears as whole-body coordination: head, Brain (controller), Balance control, Limb, Motors, Actuator, main 3D camera, 3D HD cameras, pressure sensors. It is not an isolated reasoning box but the coordinator of the entire body.
• System 1 appears as a motion-control network: main controller, programmable logic controller (PLC), deterministic networking over Ethernet, motor drives with Ethernet switches, three-axis servo drives, robotic arms driven by servo motors.
• System 0 appears as a tactile and multi-sensor ASIC (QMTS): tactile sensor array, ambient temperature, ambient light sensing with RGB detection, relative humidity, Hall sensor — with its purpose written out as “enabling real-world egocentric data collection.”

Two things are worth recording.

First, System 1’s lineage is industrial automation; System 2’s lineage is the automotive SoC. PLCs, servo drives and deterministic Ethernet belong to the OT world; 700 TOPS multi-NPU and VLA models belong to the automotive and edge-AI world. Slide 27 says it plainly: automotive and industrial experience constitute the “natural on-ramp” to robotics. This robotics stack is, in essence, a seam between two existing territories.

Second, System 0 is both the periphery and, explicitly, the collection layer for real-world first-person data. The reflex layer is simultaneously the entry point of the data flywheel — the robot collects training data for its own model while it executes.

5.3 Three “Threes” Are Really Three Axes

A clarification is unavoidable here, or the whole discussion slides into a swamp of terminology.

At least three layerings currently in the industry go by “three” and use the words System or Computer. They are not three versions of the same thing; they are three different axes:

These three axes are mutually orthogonal. A robot can simultaneously: be trained through NVIDIA’s three-computer pipeline (lifecycle axis), work at runtime under a Waymo-style device–cloud fast/slow division of labour (cognitive-speed axis), and organise its internal control hierarchy along Qualcomm’s System 2/1/0 (embodied hierarchy axis). The three do not fight, because they are not answering the same question at all.

Figure 5.1 — Orthogonal decomposition of the three “threes”. Each axis answers a different question: NVIDIA’s three computers ask “which computing environments does a model pass through from production to deployment” (lifecycle axis); Waymo’s System 1/2 asks “how is cognition divided between device and cloud by speed” (cognitive-speed axis); Qualcomm’s System 2/1/0 asks “how is the control hierarchy organised inside a single form factor” (embodied hierarchy axis). The three are orthogonal — the same robot holds one coordinate on each axis, without conflict. The figure also marks a terminological trap: both Waymo and Qualcomm use “System 1/2,” but the former means fast/slow thinking (a cognitive distinction) and the latter reasoning/action/execution (a control-hierarchy distinction) — same name, different meaning. This is the visualisation of the first original contribution of this piece.

One point deserves particular care: Qualcomm’s System 2/1/0 and Waymo’s System 1/2 share the terminology but changed the semantics. For Waymo — and in Kahneman’s original usage — System 1 and System 2 mean fast thinking and slow thinking, a cognitive distinction. For Qualcomm, System 2/1/0 means reasoning / action / execution, a control-hierarchy distinction. The same name, two meanings, and Qualcomm has additionally slipped a System 0 in.

Terminological reuse is the most common form taken by taxonomic competition: borrow a name that already carries consensus, and load it with a new semantics. This is not an accusation — it is the normal mechanism by which concepts spread, and everyone does it. But for a research series trying to establish a shared cross-domain language, pointing out this reuse is necessary housekeeping. Otherwise, in two years, nobody will be able to tell which System 2 is whose.

This is the first original contribution of this piece: the disambiguation of the three axes as orthogonal, and the semantic drift of the System 1/2 terminology between two usages.

5.4 Folding Qualcomm’s Taxonomy into the AI² Framework

What is the relationship between the three-layer interaction model and the AR ladder? The following mapping can be drawn — this is our reading, not Qualcomm’s statement:

The differences the mapping exposes carry more information than the similarities:

First, Qualcomm’s three layers lack a slot for “cross-device collaboration.” AR3 (cross-device collaborative agents) has no position in its taxonomy — it is swallowed by the single Embodied AI cell. Yet the divide between AR3 and AR4 — single-form-factor intelligence versus a multi-form-factor collaborative platform — is one of the most contested thresholds at present. Qualcomm merging it away is not an oversight; its commercial narrative does not need that seam.

Second, Qualcomm’s three layers also have no AR5. Trustworthy general-purpose agents lie outside its field of view — which is the restraint a supplier ought to show. Suppliers sell what can be delivered, not philosophical end points.

Third, Human-facing AI falls outside the AR axis altogether. It is a digital-domain dimension, whereas the entire design premise of the AR ladder is “the relationship between a designed system and the physical world.” This is not Qualcomm’s fault, nor the AR ladder’s — the two frameworks’ domains of definition do not fully overlap. An honest mapping has to report this, rather than forcing it into some cell to make the numbers work.

Which gives the conclusive mapping:

Qualcomm’s three-layer interaction model ≈ a coarse-grained projection of the AR ladder (missing AR3 and AR5, and mixing in an orthogonal digital-domain dimension); System 2/1/0 ≈ an anatomy of the interior of AR4, cognate with D3’s brain/cerebellum split but finer.

The latter matters especially: System 2/1/0 is not a replacement for the AR ladder; it is a complement to it. It describes “how an AR4 system is organised internally”; the AR ladder describes “which capability threshold that system stands at.” Two questions, two rulers. Conflate them and you commit a category error.

This is the second original contribution of this piece: a formal mapping and absorption, rather than a parallel narrative.

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6. Putting the Knife to Our Own Throat: Counter-Arguments and Failure Modes

D1’s genre carries a hard rule: every claim must come with its failure conditions. So this chapter attacks the piece itself. Below are the five places most deserving of doubt.

Counter-argument one: this is a supplier’s roadmap, not an industry fact. Qualcomm’s taxonomy serves its commercial narrative — it needs to show that “all three interaction layers belong to me” in order to hold up the TAM story. Treating a supplier’s market segmentation as independent evidence of industry ontology is an attribution error. Response: the limitation is real. Which is why this piece treats Qualcomm’s taxonomy as a point of comparison, not as corroboration — its value lies in exposing the boundaries of the existing framework (the AR3 gap, the Human-facing breach), not in confirming that “we are right.” Use it as a mirror, not as a certificate.

Counter-argument two: the risk of overfitting the framework. When someone is holding AR0–AR5, every three-layer classification starts to look like a projection of the AR ladder. The “independent reproduction” narrative conceals a seductive trap: it is far too easy to read coincidence as validation. Response: this risk cannot be entirely excluded, and this piece acknowledges it. The reason §5.4 insists so stubbornly that “differences carry more information than similarities” is precisely to offset that tendency — if a mapping produces only similarities, we are most likely looking in a mirror and confirming ourselves rather than discovering anything.

Counter-argument three: a spec is not a philosophy. Qualcomm marking SIL3 and a safety island may be purely a matter of customer requirements and regulatory access, not because it has “accepted” a fail-operational architectural philosophy. Specifications are commercial decisions, not ontological commitments. Response: this counter-argument partly holds — but it reinforces D1’s point. The burden of proof is exogenous, mandatory, involuntary. Precisely because it does not require the vendor to “come round to it” before it must be implemented, it is a watershed. A divide that has to be sustained by belief is not a watershed; a divide you must pay for whether or not you believe in it is. It does not matter whether Qualcomm believes; it still has to weld SIL3 on.

Counter-argument four: the fragility of a single attribution. The core argument of §4.2 rests on the inference that “IQ10 = the System 2 chip.” Should that specification box in fact be a consolidated description of the entire Dragonwing platform, “the burden of proof penetrates to the brain” would have to be weakened to “the platform layer possesses safety capabilities” — which still supports D1, but at markedly reduced strength. Response: this piece has marked the basis and boundary of that inference in a footnote. It is the point most in need of subsequent evidence (an independent IQ10 product brief, for instance) to nail down. This piece does not hide the weakness; it puts it in plain sight.

Counter-argument five: the evidentiary time window is too narrow. This piece is built on a single event. Design wins can be lost, roadmaps change, TAM estimates get revised. A framework comparison founded on one event has a short half-life. Response: which is exactly why this is a Deep Dive and not a Working Paper. It does not pretend to be final; it marks itself as a snapshot.

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7. Back to the Framework: What This Event Leaves the AI² Series

Three decks read; now return the gains to the framework itself.

7.1 For D1: the Watershed Judgement Holds, but Needs Rephrasing

The failure-philosophy watershed of D1 §3.3 was previously an argument; it now has a specification. And the shape that specification gives is more precise than the argument originally supposed:

The watershed is not at the infrastructure layer — that is converging at remarkable speed, and Qualcomm demonstrated as much with a single mixed-criticality chip. Nor is it at the bottom of the system — it is not a “safety module” that can be quarantined at the actuation edge. It is a through-bolt: so long as a system remains inside the chain of liability, the burden of proof travels all the way up and penetrates its most intelligent layer.

From which follows a constraint on this series’ own future writing: from here on, citations of D1’s watershed must land on “the burden of proof is different,” and can no longer be casually shortened to “the infrastructure is different.” The former is confirmed by Qualcomm’s silicon; the latter is falsified by the same piece of silicon. D1’s own text was right all along; what needs sharpening is our laziness in paraphrasing it.

7.2 For D3: External Cognate Confirmation of the Brain/Cerebellum Split — and a Moat Argument That Needs Refining

When D3 proposed “the brain is reusable, the cerebellum is not,” it did so on the evidence of a single company, Tesla. Qualcomm independently drew the same anatomy and cut the cerebellum side once more. That is cognate confirmation.

But the same material brings a challenge: Qualcomm is trying to turn the very layer D3 judged “non-reusable” into purchasable IP blocks (the Compute IP / Motion control IP / Actuation IP / Sensor IP set out along the bottom of slide 32). If motion control and the actuation layer can be bought, does D3’s moat argument loosen?

The reading here is: it does not loosen, but its landing point needs to be stated more precisely. Tesla’s non-reusability never lay in single-point IP; it lay in whole-machine integration and what D3 calls the organisational layer. Qualcomm can sell the blocks; it cannot sell the organisational capability to assemble those blocks into an embodied system that can be mass-produced, validated, and held liable. This deserves a formal treatment in future work — it is an opportunity to sharpen D3’s argument, not a hole in it.

7.3 For the AR Ladder: Two Boundaries, Illuminated From Outside

The most valuable output of this piece may not be the matches but the two non-green cells:

• The AR3 gap. Qualcomm’s three interaction layers have no slot for cross-device collaboration — it is swallowed by the Embodied AI cell. What this exposes is that the divide between AR3 and AR4 (single-form-factor intelligence versus multi-form-factor collaborative platform) is not yet generally acknowledged as a threshold in industry discourse. That threshold needs stronger argumentative support, or it will keep being merged away.
• The domain breach. Human-facing AI falls outside the AR axis, because the entire design premise of the AR ladder is “the relationship between a designed system and the physical world.” This is nobody’s fault; the two frameworks’ domains of definition do not fully overlap. An honest mapping must report it, rather than forcing it into a cell to make the numbers work.

7.4 For the Series as a Whole: Naming Rights Are Being Contested

A year ago, discussing the layering of physical AI had almost no shared vocabulary. Today at least four layerings are running simultaneously in the industry — NVIDIA’s three computers, Waymo’s System 1/2, Qualcomm’s three interaction layers and System 2/1/0, and AR0–AR5. They are mutually orthogonal, partly overlapping, colliding in nomenclature, in places sharing a name while meaning different things.

For the field, this is good news. The dense appearance of taxonomies is the mark of a discipline moving from the slogan phase into the formalisation phase. People are no longer merely shouting that “physical AI matters”; they are seriously arguing about how many layers it has and what each is called. That is the beginning of maturity. Nobody contests naming rights over an unimportant question.

For this research series, it is both validation and pressure. Validation, in that the AR ladder’s methodological principle — capability thresholds rather than a timeline, lower tiers that do not vanish — has been independently reproduced by a player of hundred-billion-dollar scale, using the same verb, compounding. Pressure, in that whether a framework becomes a shared language depends on whether it can absorb other people’s classifications, not on whether it can run alongside them.

So what this piece does is not to declare that we are right. It performs a mapping — absorbing what can be absorbed, and saying plainly what cannot.

7.5 Next

This event simultaneously opens three follow-up questions, recorded here as anchors for future observation:

One: the two routes to AR4. Tesla is a vertically closed-loop AR4; Qualcomm is a horizontally supplied one — one builds the entire chain itself, the other turns every link in the chain into a product sold to everybody. The two routes differ in cost structure, diffusion speed and failure mode. This is a fork the series has not yet formally addressed.

Two: 2028 is a dense convergence point. Qualcomm’s robotics and automotive roadmaps, several OEMs’ platform SOPs, and the accelerator generation change on the data-centre side all point to around 2028. At that point this comparison can be re-verified — whether the roadmaps were delivered is itself a falsification point.

Three: the most fragile nail in this piece needs driving home. “IQ10 = System 2” is currently a visual-grammar inference. An independent IQ10 product brief would either confirm or overturn it. Until then, the strength of the argument in §4.2 stands as bounded by its footnote.

This is what we see at this moment. It will change.

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Appendix: Slides Cited

Related existing work: D1 §3.3 (failure philosophy), §3.4 (hypervisors and mixed criticality), §3.5 (Waymo System 1/2), §3.7 (two-layer structure), §4.4.2 (NVIDIA three computers), §5.2 (AR0–AR5); D3 (mechanisms of brain/cerebellum reuse).

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Disclosure of Interest

This piece was written by the archi-intelligence research team. archi-intelligence is an independent academic research institute dedicated to the architecture intelligence research paradigm; its research work is affiliated with the commercial entity Arkimind, and the full governance structure and conflict-of-interest management are set out in Working Paper D1, Appendix F.4 (COI Disclosure).

This piece does not assess the capabilities of any architecture tool or product, and contains no judgement regarding the market landscape for architecture reasoning tools. All cited material consists of publicly disclosed official documents; this piece has no commercial relationship with Qualcomm or with any company mentioned herein.

Published under CC-BY 4.0.

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Deep Dive is the short-cycle observation column of the archi-intelligence research series. Unlike the Working Papers, Deep Dives do not enter the DOI system and may be revised or overturned by later observation.

Footnotes

1. Slide 32 does not state in words that “the IQ10 carries System 2.” The attribution is inferred from the callout-line relationships on the page: the head-mounted IQ10 marker → the specification box on the right, and the SYSTEM 2 | REASONING callout → the head. The same page carries further Dragonwing markers at the shoulder (SYSTEM 1 | ACTION → “Local limb intelligence”) and the knee (SYSTEM 0 | EXECUTION → “Motor control and actuations”); per slide 39, the Dragonwing family comprises IQ10 / IQ9 / IQ8. Should that specification box in fact be a consolidated description of the whole Dragonwing platform rather than of the IQ10 as a single part, the argument in this section must be weakened accordingly. ↩